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European H2020 Project WORTECS Wireless Mixed Reality Prototyping

2020, Bouchet, Olivier, O'Brien, Dominic, Singh, Ravinder, Faulkner, Grahame, Ghoraishi, Mir, Garcia-Marquez, Jorge, Vercasson, Guillaume, Brzozowski, Marcin, Sark, Vladica

This paper presents European collaborative project WORTECS objectives and reports on the development of several radio and optical wireless prototypes and a demonstrator targeting mixed reality (MR) application. The aim is to achieve a net throughput of up to Tbps in an indoor heterogeneous network for the MR use case, which seems to be a high throughput "killer application" beyond 5G. A special routing device is associated with the demonstrator to select the most suitable wireless access technology. Post introduction to the project, an overview of the demonstrator is presented with details of the current progress of the prototypes.

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Design and Evaluation of Radiation-Hardened Standard Cell Flip-Flops

2021, Schrape, Oliver, Andjelkovic, Marko, Breitenreiter, Anselm, Zeidler, Steffen, Balashov, Alexey, Krstic, Milos

Use of a standard non-rad-hard digital cell library in the rad-hard design can be a cost-effective solution for space applications. In this paper we demonstrate how a standard non-rad-hard flip-flop, as one of the most vulnerable digital cells, can be converted into a rad-hard flip-flop without modifying its internal structure. We present five variants of a Triple Modular Redundancy (TMR) flip-flop: baseline TMR flip-flop, latch-based TMR flip-flop, True-Single Phase Clock (TSPC) TMR flip-flop, scannable TMR flip-flop and self-correcting TMR flip-flop. For all variants, the multi-bit upsets have been addressed by applying special placement constraints, while the Single Event Transient (SET) mitigation was achieved through the usage of customized SET filters and selection of optimal inverter sizes for the clock and reset trees. The proposed flip-flop variants feature differing performance, thus enabling to choose the optimal solution for every sensitive node in the circuit, according to the predefined design constraints. Several flip-flop designs have been validated on IHP’s 130nm BiCMOS process, by irradiation of custom-designed shift registers. It has been shown that the proposed TMR flip-flops are robust to soft errors with a threshold Linear Energy Transfer (LET) from ( 32.4 (MeV⋅cm2/mg) ) to ( 62.5 (MeV⋅cm2/mg) ), depending on the variant.