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Temperature-Dependent Charge Carrier Diffusion in [0001¯] Direction of GaN Determined by Luminescence Evaluation of Buried InGaN Quantum Wells
2020, Netzel, Carsten, Hoffmann, Veit, Tomm, Jens W., Mahler, Felix, Einfeldt, Sven, Weyers, Markus
Temperature-dependent transport of photoexcited charge carriers through a nominally undoped, c-plane GaN layer toward buried InGaN quantum wells is investigated by continuous-wave and time-resolved photoluminescence spectroscopy. The excitation of the buried InGaN quantum wells is dominated by charge carrier diffusion through the GaN layer; photon recycling contributes only slightly. With temperature decreasing from 310 to 10 K, the diffusion length in [0001⎯⎯] direction increases from 250 to 600 nm in the GaN layer. The diffusion length at 300 K also increases from 100 to 300 nm when increasing the excitation power density from 20 to 500 W cm−2. The diffusion constant decreases from the low-temperature value of ∼7 to 1.5 cm2 s−1 at 310 K. The temperature dependence of the diffusion constant indicates that the diffusivity at room temperature is limited by optical phonon scattering. Consequently, higher diffusion constants in GaN-based devices require a reduced operation temperature. To increase diffusion lengths at a fixed temperature, the effective recombination time has to be prolonged by reducing the number of nonradiative recombination centers.
On the Conduction Properties of Vertical GaN n-Channel Trench MISFETs
2021, Treidel, Eldad Bahat, Hilt, Oliver, Hoffmann, Veit, Brunner, Frank, Bickel, Nicole, Thies, Andreas, Tetzner, Kornelius, Gargouri, Hassan, Huber, Christian, Donimirski, Konstanty, Wurfl, Joachim
ON-state conductance properties of vertical GaN n -channel trench MISFETs manufactured on different GaN substrates and having different gate trench orientations are studied up to 200 °C ambient temperature. The best performing devices, with a maximum output current above 4 kA/cm 2 and an area specific ON-state resistance of 1.1 mΩ·cm 2 , are manufactured on ammonothermal GaN substrate with the gate channel parallel to the a-plane of the GaN crystal. The scalability of the devices up to 40 mm gate periphery is investigated and demonstrated. It is found that, in addition to oxide interface traps, the semiconductor border traps in the p-GaN layer limit the available mobile channel electrons and that the channel surface roughness scattering limits the channel mobility. Both strongly depend on the gate trench orientation and on the GaN substrate defect density.