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    Test beam measurement of the first prototype of the fast silicon pixel monolithic detector for the TT-PET project
    (London : Inst. of Physics, 2018) Paolozzi, L.; Bandi, Y.; Benoit, M.; Cardarelli, R.; Débieux, S.; Forshaw, D.; Hayakawa, D.; Iacobucci, G.; Kaynak, M.; Miucci, A.; Nessi, M.; Ratib, O.; Ripiccini, E.; Rücker, H.; Valerio, P.; Weber, M.
    The TT-PET collaboration is developing a PET scanner for small animals with 30 ps time-of-flight resolution and sub-millimetre 3D detection granularity. The sensitive element of the scanner is a monolithic silicon pixel detector based on state-of-the-art SiGe BiCMOS technology. The first ASIC prototype for the TT-PET was produced and tested in the laboratory and with minimum ionizing particles. The electronics exhibit an equivalent noise charge below 600 e− RMS and a pulse rise time of less than 2 ns , in accordance with the simulations. The pixels with a capacitance of 0.8 pF were measured to have a detection efficiency greater than 99% and, although in the absence of the post-processing, a time resolution of approximately 200 ps .
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    A monolithic ASIC demonstrator for the Thin Time-of-Flight PET scanner
    (London : Inst. of Physics, 2019) Valerio, P.; Cardarelli, R.; Iacobucci, G.; Paolozzi, L.; Ripiccini, E.; Hayakawa, D.; Bruno, S.; Caltabiano, A.; Kaynak, M.; Rücker, H.; Nessi, M.
    Time-of-flight measurement is an important advancement in PET scanners to improve image reconstruction with a lower delivered radiation dose. This article describes the monolithic ASIC for the TT-PET project, a novel idea for a high-precision PET scanner for small animals. The chip uses a SiGe Bi-CMOS process for timing measurements, integrating a fully-depleted pixel matrix with a low-power BJT-based front-end per channel, integrated on the same 100 µm thick die. The target timing resolution of the scanner is 30 ps RMS for electrons from the conversion of 511 keV photons. The system will include 1.6 million channels across almost 2000 different chips. A full-featured demonstrator chip with a 3×10 matrix of 500×500 µm2 pixels was fabricated to validate each block. Its design and experimental results are presented here. © 2019 CERN.