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Selective electrodeposition of indium microstructures on silicon and their conversion into InAs and InSb semiconductors
Abstract: The idea of benefitting from the properties of III-V semiconductors and silicon on the same substrate has been occupying the minds of scientists for several years. Although the principle of III-V integration on a silicon-based platform is simple, it is often challenging to perform due to demanding requirements for sample preparation rising from a mismatch in physical properties between those semiconductor groups (e.g. different lattice constants and thermal expansion coefficients), high cost of device-grade materials formation and their post-processing. In this paper, we demonstrate the deposition of group-III metal and III-V semiconductors in microfabricated template structures on silicon as a strategy for heterogeneous device integration on Si. The metal (indium) is selectively electrodeposited in a 2-electrode galvanostatic configuration with the working electrode (WE) located in each template, resulting in well-defined In structures of high purity. The semiconductors InAs and InSb are obtained by vapour phase diffusion of the corresponding group-V element (As, Sb) into the liquified In confined in the template. We discuss in detail the morphological and structural characterization of the synthesized In, InAs and InSb crystals as well as chemical analysis through scanning electron microscopy (SEM), scanning transmission electron microscopy (TEM/STEM), and energy-dispersive X-ray spectroscopy (EDX). The proposed integration path combines the advantage of the mature top-down lithography technology to define device geometries and employs economic electrodeposition (ED) and vapour phase processes to directly integrate difficult-to-process materials on a silicon platform. Graphical abstract: [Figure not available: see fulltext.].
Transition to the quantum hall regime in InAs nanowire cross-junctions
We present a low-temperature electrical transport study on four-terminal ballistic InAs nanowire cross-junctions in magnetic fields aligned perpendicular to the cross-plane. Two-terminal longitudinal conductance measurements between opposing contact terminals reveal typical 1D conductance quantization at zero magnetic field. As the magnetic field is applied, the 1D bands evolve into hybrid magneto-electric sub-levels that eventually transform into Landau levels for the widest nanowire devices investigated (width = 100 nm). Hall measurements in a four-terminal configuration on these devices show plateaus in the transverse Hall resistance at high magnetic fields that scale with (ve 2 /h) -1 . e is the elementary charge, h denotes Planck's constant and v is an integer that coincides with the Landau level index determined from the longitudinal conductance measurements. While the 1D conductance quantization in zero magnetic field is fragile against disorder at the NW surface, the plateaus in the Hall resistance at high fields remain robust as expected for a topologically protected Quantum Hall phase. © 2019 IOP Publishing Ltd.