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An integrated 3.1-5.1 GHz pulse generator for ultra-wideband wireless localization systems
2006, Fan, X., Fischer, G., Dietrich, B.
This paper presents an implementation of an integrated Ultra-wideband (UWB), Binary-Phase Shift Keying (BPSK) Gaussian modulated pulse generator. VCO, multiplier and passive Gaussian filter are the key components. The VCO provides the carrier frequency of 4.1 GHz, the LC Gaussian filter is responsible for the pulse shaping in the baseband. Multiplying the baseband pulse and the VCO frequency shifts the pulse to the desired center frequency. The generated Gaussian pulse ocupppies the frequency range from 3.1 to 5.1 GHz with the center frequency at 4.1 GHz. Simulations and measured results show that this spectrum fulfills the mask for indoor communication systems given by the FCC (Federal Communications Commission, 2002). The total power consumption is 55 mW using a supply voltage of 2.5 V. Circuits are realized using the IHP 0.25 μm SiGe:C BiCMOS technology.
Phase noise and jitter modeling for fractional-N PLLs
2007, Osmany, S.A., Herzel, F., Schmalz, K., Winkler, W.
We present an analytical phase noise model for fractional-N phase-locked loops (PLL) with emphasis on integrated RF synthesizers in the GHz range. The noise of the crystal reference, the voltage-controlled oscillator (VCO), the loop filter, the charge pump, and the sigma-delta modulator (SDM) is filtered by the PLL operation. We express the rms phase error (jitter) in terms of phase noise of the reference, the VCO phase noise and the third-order loop filter parameters. In addition, we consider OFDM systems, where the PLL phase noise is reduced by digital signal processing after down-conversion of the RF signal to baseband. The rms phase error is discussed as a function of the loop parameters. Our model drastically simplifies the noise optimization of the PLL loop dynamics.