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Publisher: London : Hindawi × WGL Institute: IHP ×

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Now showing 1 - 5 of 5
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    Room temperature direct band gap emission from Ge p-i-n heterojunction photodiodes
    (London : Hindawi, 2012) Kasper, E.; Oehme, M.; Arguirov, T.; Werner, J.; Kittler, M.; Schulze, J.
    Room temperature direct band gap emission is observed for Si-substrate-based Ge p-i-n heterojunction photodiode structures operated under forward bias. Comparisons of electroluminescence with photoluminescence spectra allow separating emission from intrinsic Ge (0.8 eV) and highly doped Ge (0.73 eV). Electroluminescence stems fromcarrier injection into the intrinsic layer, whereas photoluminescence originates from the highly n-doped top layer because the exciting visible laser wavelength is strongly absorbed in Ge. High doping levels led to an apparent band gap narrowing from carrier-impurity interaction. The emission shifts to higher wavelengths with increasing current level which is explained by device heating. The heterostructure layer sequence and the light emitting device are similar to earlier presented photodetectors. This is an important aspect for monolithic integration of silicon microelectronics and silicon photonics.
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    Support for a long lifetime and short end-to-end delays with TDMA protocols in sensor networks
    (London : Hindawi, 2012) Brzozowski, Marcin; Salomon, Hendrik; Langendoerfer, Peter
    This work addresses a tough challenge of achieving two opposing goals: ensuring long lifetimes and supporting short end-to-end delays in sensor networks. Obviously, sensor nodes must wake up often to support short delays in multi-hop networks. As event occurs seldom in common applications, most wake-up are useless: nodes waste energy due to idle listening. We introduce a set of solutions, referred to as LETED (limiting end-to-end delays), which shorten the wake-up periods, reduce idle listening, and save energy. We exploit hardware features of available transceivers that allow early detection of idle wake-up periods. This feature is introduced on top of our approach to reduce idle listening stemming from clock drift owing to the estimation of run-time drift. To evaluate LETED and other MAC protocols that support short end-to-end delays we present an analytical model, which considers almost 30 hardware and software parameters. Our evaluation revealed that LETED reduces idle listening by 15x and more against similar solutions. Also, LETED outperforms other protocols and provides significant longer lifetimes. For example, nodes with LETED work 8x longer than those with a common TDMA and 2x-3x longer than with protocols based on preamble sampling, like B-MAC.
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    Adaptable security in wireless sensor networks by using reconfigurable ECC hardware coprocessors
    (London : Hindawi, 2010) Portilla, J.; Otero, A.; de la Torre, E.; Riesgo, T.; Stecklina, O.; Peter, S.; Langendörfer, P.
    Specific features of Wireless Sensor Networks (WSNs) like the open accessibility to nodes, or the easy observability of radio communications, lead to severe security challenges. The application of traditional security schemes on sensor nodes is limited due to the restricted computation capability, low-power availability, and the inherent low data rate. In order to avoid dependencies on a compromised level of security, a WSN node with a microcontroller and a Field Programmable Gate Array (FPGA) is used along this work to implement a state-of-the art solution based on ECC (Elliptic Curve Cryptography). In this paper it is described how the reconfiguration possibilities of the system can be used to adapt ECC parameters in order to increase or reduce the security level depending on the application scenario or the energy budget. Two setups have been created to compare the softwareand hardware-supported approaches. According to the results, the FPGA-based ECC implementation requires three orders of magnitude less energy, compared with a low power microcontroller implementation, even considering the power consumption overhead introduced by the hardware reconfiguration.
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    Data link layer considerations for future 100 Gbps terahertz band transceivers
    (London : Hindawi, 2017) Lopacinski, Lukasz; Brzozowski, Marcin; Kraemer, Rolf
    This paper presents a hardware processor for 100Gbps wireless data link layer. A serial Reed-Solomon decoder requires a clock of 12.5GHz to fulfill timings constraints of the transmission. Receiving a single Ethernet frame on a 100 Gbps physical layer may be faster than accessing DDR3 memory. Processing so fast streams on a state-of-the-art FPGA (field programmable gate arrays) requires a dedicated approach. Thus, the paper presents lightweight RS FEC engine, frames fragmentation, aggregation, and a protocol with selective fragment retransmission. The implemented FPGA demonstrator achieves nearly 120 Gbps and accepts bit error rate (BER) up to 2e - 3. Moreover, redundancy added to the frames is adopted according to the channel BER by a dedicated link adaptation algorithm. At the end, ASIC synthesis results are presented including detailed statistics of consumed energy per bit.
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    Energy conservation and harvesting in wireless sensor networks
    (London : Hindawi, 2019) Stojcev, Mile; Stamenkovic, Zoran; Dimitrijevic, Bojan
    [No abstract available]