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Subject: HVPE ×

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    Growth and Properties of Intentionally Carbon-Doped GaN Layers
    (Weinheim : Wiley-VCH, 2019) Richter, Eberhard; Beyer, Franziska C.; Zimmermann, Friederike; Gärtner, Günter; Irmscher, Klaus; Gamov, Ivan; Heitmann, Johannes; Weyers, Markus; Tränkle, Günther
    Carbon-doping of GaN layers with thickness in the mm-range is performed by hydride vapor phase epitaxy. Characterization by optical and electrical measurements reveals semi-insulating behavior with a maximum of specific resistivity of 2 × 1010 Ω cm at room temperature found for a carbon concentration of 8.8 × 1018 cm−3. For higher carbon levels up to 3.5 × 1019 cm−3, a slight increase of the conductivity is observed and related to self-compensation and passivation of the acceptor. The acceptor can be identified as CN with an electrical activation energy of 0.94 eV and partial passivation by interstitial hydrogen. In addition, two differently oriented tri-carbon defects, CN-a-CGa-a-CN and CN-a-CGa-c-CN, are identified which probably compensate about two-thirds of the carbon which is incorporated in excess of 2 × 1018 cm−3. © 2019 The Authors. Published by WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
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    On the Conduction Properties of Vertical GaN n-Channel Trench MISFETs
    ([New York, NY] : IEEE, 2021) Treidel, Eldad Bahat; Hilt, Oliver; Hoffmann, Veit; Brunner, Frank; Bickel, Nicole; Thies, Andreas; Tetzner, Kornelius; Gargouri, Hassan; Huber, Christian; Donimirski, Konstanty; Wurfl, Joachim
    ON-state conductance properties of vertical GaN n -channel trench MISFETs manufactured on different GaN substrates and having different gate trench orientations are studied up to 200 °C ambient temperature. The best performing devices, with a maximum output current above 4 kA/cm 2 and an area specific ON-state resistance of 1.1 mΩ·cm 2 , are manufactured on ammonothermal GaN substrate with the gate channel parallel to the a-plane of the GaN crystal. The scalability of the devices up to 40 mm gate periphery is investigated and demonstrated. It is found that, in addition to oxide interface traps, the semiconductor border traps in the p-GaN layer limit the available mobile channel electrons and that the channel surface roughness scattering limits the channel mobility. Both strongly depend on the gate trench orientation and on the GaN substrate defect density.