Enhancement-mode Ga2O3 wrap-gate fin field-effect transistors on native (100) β-Ga2O3 substrate with high breakdown voltage

dc.bibliographicCitation.firstPage213501eng
dc.bibliographicCitation.issue21eng
dc.bibliographicCitation.journalTitleApplied Physics Letterseng
dc.bibliographicCitation.volume109eng
dc.contributor.authorChabak, Kelson D.
dc.contributor.authorMoser, Neil
dc.contributor.authorGreen, Andrew J.
dc.contributor.authorWalker, Dennis E.
dc.contributor.authorTetlak, Stephen E.
dc.contributor.authorHeller, Eric
dc.contributor.authorCrespo, Antonio
dc.contributor.authorFitch, Robert
dc.contributor.authorMcCandless, Jonathan P.
dc.contributor.authorLeedy, Kevin
dc.contributor.authorBaldini, Michele
dc.contributor.authorWagner, Gunter
dc.contributor.authorGalazka, Zbigniew
dc.contributor.authorLi, Xiuling
dc.contributor.authorJessen, Gregg
dc.date.accessioned2022-05-18T05:06:53Z
dc.date.available2022-05-18T05:06:53Z
dc.date.issued2016
dc.description.abstractSn-doped gallium oxide (Ga2O3) wrap-gate fin-array field-effect transistors (finFETs) were formed by top-down BCl3 plasma etching on a native semi-insulating Mg-doped (100) β-Ga2O3 substrate. The fin channels have a triangular cross-section and are approximately 300 nm wide and 200 nm tall. FinFETs, with 20 nm Al2O3 gate dielectric and ∼2 μm wrap-gate, demonstrate normally-off operation with a threshold voltage between 0 and +1 V during high-voltage operation. The ION/IOFF ratio is greater than 105 and is mainly limited by high on-resistance that can be significantly improved. At VG = 0, a finFET with 21 μm gate-drain spacing achieved a three-terminal breakdown voltage exceeding 600 V without a field-plate.eng
dc.description.versionpublishedVersioneng
dc.identifier.urihttps://oa.tib.eu/renate/handle/123456789/8984
dc.identifier.urihttps://doi.org/10.34657/8022
dc.language.isoengeng
dc.publisherMelville, NY : American Inst. of Physicseng
dc.relation.doihttps://doi.org/10.1063/1.4967931
dc.relation.essn1077-3118
dc.relation.issn0003-6951
dc.rights.licenseCC BY 4.0 Unportedeng
dc.rights.urihttps://creativecommons.org/licenses/by/4.0/eng
dc.subject.ddc530eng
dc.subject.otherAluminaeng
dc.subject.otherAluminum oxideeng
dc.subject.otherBoron compoundseng
dc.subject.otherChlorine compoundseng
dc.subject.otherElectric breakdowneng
dc.subject.otherFinFETeng
dc.subject.otherFins (heat exchange)eng
dc.subject.otherGate dielectricseng
dc.subject.otherHeterojunction bipolar transistorseng
dc.subject.otherHigh electron mobility transistorseng
dc.subject.otherMagnesium compoundseng
dc.subject.otherPlasma etchingeng
dc.subject.otherSemiconductor junctionseng
dc.subject.otherThreshold voltageeng
dc.subject.otherTin compoundseng
dc.subject.otherEnhancement modeseng
dc.subject.otherFin field effect transistorseng
dc.subject.otherGallium oxideseng
dc.subject.otherHigh breakdown voltageeng
dc.subject.otherHigh-voltage operationeng
dc.subject.otherOn-resistanceeng
dc.subject.otherSemi-insulatingeng
dc.subject.otherTriangular cross-sectionseng
dc.subject.otherGallium compoundseng
dc.titleEnhancement-mode Ga2O3 wrap-gate fin field-effect transistors on native (100) β-Ga2O3 substrate with high breakdown voltageeng
dc.typeArticleeng
dc.typeTexteng
tib.accessRightsopenAccesseng
wgl.contributorMBIeng
wgl.subjectPhysikeng
wgl.typeZeitschriftenartikeleng
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