Selective electrodeposition of indium microstructures on silicon and their conversion into InAs and InSb semiconductors

dc.bibliographicCitation.firstPage4
dc.bibliographicCitation.issue1
dc.bibliographicCitation.journalTitleNanoscale research letters : NRLeng
dc.bibliographicCitation.volume18
dc.contributor.authorHnida-Gut, Katarzyna E.
dc.contributor.authorSousa, Marilyne
dc.contributor.authorTiwari, Preksha
dc.contributor.authorSchmid, Heinz
dc.date.accessioned2023-06-02T15:00:32Z
dc.date.available2023-06-02T15:00:32Z
dc.date.issued2023
dc.description.abstractAbstract: The idea of benefitting from the properties of III-V semiconductors and silicon on the same substrate has been occupying the minds of scientists for several years. Although the principle of III-V integration on a silicon-based platform is simple, it is often challenging to perform due to demanding requirements for sample preparation rising from a mismatch in physical properties between those semiconductor groups (e.g. different lattice constants and thermal expansion coefficients), high cost of device-grade materials formation and their post-processing. In this paper, we demonstrate the deposition of group-III metal and III-V semiconductors in microfabricated template structures on silicon as a strategy for heterogeneous device integration on Si. The metal (indium) is selectively electrodeposited in a 2-electrode galvanostatic configuration with the working electrode (WE) located in each template, resulting in well-defined In structures of high purity. The semiconductors InAs and InSb are obtained by vapour phase diffusion of the corresponding group-V element (As, Sb) into the liquified In confined in the template. We discuss in detail the morphological and structural characterization of the synthesized In, InAs and InSb crystals as well as chemical analysis through scanning electron microscopy (SEM), scanning transmission electron microscopy (TEM/STEM), and energy-dispersive X-ray spectroscopy (EDX). The proposed integration path combines the advantage of the mature top-down lithography technology to define device geometries and employs economic electrodeposition (ED) and vapour phase processes to directly integrate difficult-to-process materials on a silicon platform. Graphical abstract: [Figure not available: see fulltext.].eng
dc.description.versionpublishedVersioneng
dc.identifier.urihttps://oa.tib.eu/renate/handle/123456789/12254
dc.identifier.urihttp://dx.doi.org/10.34657/11286
dc.language.isoeng
dc.publisherNew York, NY [u.a.] : Springer
dc.relation.doihttps://doi.org/10.1186/s11671-023-03778-9
dc.relation.essn1556-276X
dc.rights.licenseCC BY 4.0 Unported
dc.rights.urihttps://creativecommons.org/licenses/by/4.0
dc.subject.ddc600
dc.subject.ddc540
dc.subject.otherElectrodepositioneng
dc.subject.otherIII-Vseng
dc.subject.otherIntegrationeng
dc.subject.otherRecrystallizationeng
dc.subject.otherSaturationeng
dc.subject.otherTASEeng
dc.titleSelective electrodeposition of indium microstructures on silicon and their conversion into InAs and InSb semiconductorseng
dc.typeArticleeng
dc.typeTexteng
tib.accessRightsopenAccess
wgl.contributorIHP
wgl.subjectChemieger
wgl.typeZeitschriftenartikelger
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