Effiziente Hardwareimplementierung von FEC-Verfahren in ASIC Technologie; im KMUi-Verbundprojekt: FACTOR - Fehlerkorrekturverfahren für hochratige, optische Freiraumkommunikation
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Hannover : Technische Informationsbibliothek
Supplementary Material
https://doi.org/10.1109/ISTC57237.2023.10273561
https://doi.org/10.1109/ACCESS.2024.3517704
https://doi.org/10.1109/IEEECONF60004.2024.10942759
https://doi.org/10.23919/DATE58400.2024.10546787
https://doi.org/10.1117/12.3001394
https://doi.org/10.1109/ACCESS.2025.3620475
https://doi.org/10.1109/ISTC65386.2025.11154507
https://doi.org/10.1109/ACCESS.2024.3517704
https://doi.org/10.1109/IEEECONF60004.2024.10942759
https://doi.org/10.23919/DATE58400.2024.10546787
https://doi.org/10.1117/12.3001394
https://doi.org/10.1109/ACCESS.2025.3620475
https://doi.org/10.1109/ISTC65386.2025.11154507
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CC BY-NC-ND 3.0 DE