First demonstration of phase-controlled etching for high aspect ratio silicon structures using triode-type capacitively coupled plasmas

Abstract

Conventional capacitively coupled plasma (CCP) discharges face the inherent challenge of low etch uniformity due to their planar structure and relatively poor etch selectivity compared to inductively coupled plasma (ICP) discharges. Accordingly, it makes it difficult to etch silicon structures with a high aspect ratio (HAR). Previous studies have shown that phase-controlled etching can effectively control the etching performance using a triode-type CCP chamber. However, no academic evidence has yet been found on whether this technique is practical for HAR applications. Therefore, in this study, we conducted an in-depth investigation of phase-controlled etching through cross-validation with simulations and real wafer studies; and most importantly, we provided the first experimental results of phase-controlled etching using a SiO<inf>2</inf>/Si<inf>3</inf>N<inf>4</inf> pair-layered pattern wafer with HAR structures. The experimental results were in good agreement with simulation results based on a hybrid plasma equipment model. We also demonstrated that optimal control of the phase difference between the two opposite electrodes in the triode-type CCP chamber could effectively control the plasma density and sheath thickness and significantly improve the etching performance, resulting in a 14% improvement in the neck critical dimension (CD) of the mask layer and a 32% improvement in the bottom CD of the HAR pattern. Based on the results, we conclude that phase-controlled etching can be a useful solution in semiconductor manufacturing for a wide range of HAR applications.