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Now showing 1 - 10 of 23
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    Label free sensing of creatinine using a 6 GHz CMOS near-field dielectric immunosensor
    (Cambridge : Royal Society of Chemistry, 2015) Guha, S.; Warsinke, A.; Tientcheu, Ch.M.; Schmalz, K.; Meliani, C.; Wenger, Ch.
    In this work we present a CMOS high frequency direct immunosensor operating at 6 GHz (C-band) for label free determination of creatinine. The sensor is fabricated in standard 0.13 μm SiGe:C BiCMOS process. The report also demonstrates the ability to immobilize creatinine molecules on a Si3N4 passivation layer of the standard BiCMOS/CMOS process, therefore, evading any further need of cumbersome post processing of the fabricated sensor chip. The sensor is based on capacitive detection of the amount of non-creatinine bound antibodies binding to an immobilized creatinine layer on the passivated sensor. The chip bound antibody amount in turn corresponds indirectly to the creatinine concentration used in the incubation phase. The determination of creatinine in the concentration range of 0.88–880 μM is successfully demonstrated in this work. A sensitivity of 35 MHz/10 fold increase in creatinine concentration (during incubation) at the centre frequency of 6 GHz is gained by the immunosensor. The results are compared with a standard optical measurement technique and the dynamic range and sensitivity is of the order of the established optical indication technique. The C-band immunosensor chip comprising an area of 0.3 mm2 reduces the sensing area considerably, therefore, requiring a sample volume as low as 2 μl. The small analyte sample volume and label free approach also reduce the experimental costs in addition to the low fabrication costs offered by the batch fabrication technique of CMOS/BiCMOS process.
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    Charge pump design in 130 nm SiGe BiCMOS technology for low-noise fractional-N PLLs
    (München : European Geopyhsical Union, 2015) Kucharski, M.; Herzel, F.
    This paper presents a numerical comparison of charge pumps (CP) designed for a high linearity and a low noise to be used in a fractional-N phase-locked loop (PLL). We consider a PLL architecture, where two parallel CPs with DC offset are used. The CP for VCO fine tuning is biased at the output to keep the VCO gain constant. For this specific architecture, only one transistor per CP is relevant for phase detector linearity. This can be an nMOSFET, a pMOSFET or a SiGe HBT, depending on the design. The HBT-based CP shows the highest linearity, whereas all charge pumps show similar device noise. An internal supply regulator with low intrinsic device noise is included in the design optimization.
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    Self-calibrating highly sensitive dynamic capacitance sensor: Towards rapid sensing and counting of particles in laminar flow systems
    (Cambridge : Royal Society of Chemistry, 2015) Guha, S.; Schmalz, K.; Wenger, Ch.; Herzel, F.
    In this report we propose a sensor architecture and a corresponding read-out technique on silicon for the detection of dynamic capacitance change. This approach can be applied to rapid particle counting and single particle sensing in a fluidic system. The sensing principle is based on capacitance variation of an interdigitated electrode (IDE) structure embedded in an oscillator circuit. The capacitance scaling of the IDE results in frequency modulation of the oscillator. A demodulator architecture is employed to provide a read-out of the frequency modulation caused by the capacitance change. A self-calibrating technique is employed at the read-out amplifier stage. The capacitance variation of the IDE due to particle flow causing frequency modulation and the corresponding demodulator read-out has been analytically modelled. Experimental verification of the established model and the functionality of the sensor chip were shown using a modulating capacitor independent of fluidic integration. The initial results show that the sensor is capable of detecting frequency changes of the order of 100 parts per million (PPM), which translates to a shift of 1.43 MHz at 14.3 GHz operating frequency. It is also shown that a capacitance change every 3 μs can be accurately detected.
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    Plasma enhanced complete oxidation of ultrathin epitaxial praseodymia films on Si(111)
    (Basel : MDPI, 2015) Kuschel, Olga; Dieck, Florian; Wilkens, Henrik; Gevers, Sebastian; Rodewald, Jari; Otte, Christian; Zoellner, Marvin Hartwig; Niu, Gang; Schroeder, Thomas; Wollschläger, Joachim
    Praseodymia films have been exposed to oxygen plasma at room temperature after deposition on Si(111) via molecular beam epitaxy. Different parameters as film thickness, exposure time and flux during plasma treatment have been varied to study their influence on the oxygen plasma oxidation process. The surface near regions have been investigated by means of X-ray photoelectron spectroscopy showing that the plasma treatment transforms the stoichiometry of the films from Pr2O3 to PrO2. Closer inspection of the bulk properties of the films by means of synchrotron radiation based X-ray reflectometry and diffraction confirms this transformation if the films are thicker than some critical thickness of 6 nm. The layer distance of these films is extremely small verifying the completeness of the plasma oxidation process. Thinner films, however, cannot be transformed completely. For all films, less oxidized very thin interlayers are detected by these experimental techniques.
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    Controlling the physics and chemistry of binary and ternary praseodymium and cerium oxide systems
    (Cambridge : Royal Society of Chemistry, 2015) Niu, Gang; Zoellner, Marvin Hartwig; Schroeder, Thomas; Schaefer, Andreas; Jhang, Jin-Hao; Zielasek, Volkmar; Bäumer, Marcus; Wilkens, Henrik; Wollschläger, Joachim; Olbrich, Reinhard; Lammers, Christian; Reichling, Michael
    Rare earth praseodymium and cerium oxides have attracted intense research interest in the last few decades, due to their intriguing chemical and physical characteristics. An understanding of the correlation between structure and properties, in particular the surface chemistry, is urgently required for their application in microelectronics, catalysis, optics and other fields. Such an understanding is, however, hampered by the complexity of rare earth oxide materials and experimental methods for their characterisation. Here, we report recent progress in studying high-quality, single crystalline, praseodymium and cerium oxide films as well as ternary alloys grown on Si(111) substrates. Using these well-defined systems and based on a systematic multi-technique surface science approach, the corresponding physical and chemical properties, such as the surface structure, the surface morphology, the bulk–surface interaction and the oxygen storage/release capability, are explored in detail. We show that specifically the crystalline structure and the oxygen stoichiometry of the oxide thin films can be well controlled by the film preparation method. This work leads to a comprehensive understanding of the properties of rare earth oxides and highlights the applications of these versatile materials. Furthermore, methanol adsorption studies are performed on binary and ternary rare earth oxide thin films, demonstrating the feasibility of employing such systems for model catalytic studies. Specifically for ceria systems, we find considerable stability against normal environmental conditions so that they can be considered as a “materials bridge” between surface science models and real catalysts. Graphical abstract: Controlling the physics and chemistry of binary and ternary praseodymium and cerium oxide systems
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    Post deposition annealing of epitaxial Ce1-xPrxO2-δ films grown on Si(111)
    (Cambridge : RSC Publ., 2015) Wilkens, H.; Spieß, W.; Zoellner, M.H.; Niu, G.; Schroeder, T.; Wollschläger, J.
    In this work the structural and morphological changes of Ce1−xPrxO2−δ (x = 0.20, 0.35 and 0.75) films grown on Si(111) due to post deposition annealing are investigated by low energy electron diffraction combined with a spot profile analysis. The surface of the oxide films exhibit mosaics with large terraces separated by monoatomic steps. It is shown that the Ce/Pr ratio and post deposition annealing temperature can be used to tune the mosaic spread, terrace size and step height of the grains. The morphological changes are accompanied by a phase transition from a fluorite type lattice to a bixbyite structure. Furthermore, at high PDA temperatures a silicate formation via a polycrystalline intermediate state is observed.
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    High-resolution characterization of the forbidden Si 200 and Si 222 reflections
    (Chester : International Union of Crystallography, 2015) Zaumseil, P.
    The occurrence of the basis-forbidden Si 200 and Si 222 reflections in specular X-ray diffraction !–2 scans is investigated in detail as a function of the inplane sample orientation. This is done for two different diffractometer types with low and high angular divergence perpendicular to the diffraction plane. It is shown that the reflections appear for well defined conditions as a result of multiple diffraction, and not only do the obtained peaks vary in intensity but additional features like shoulders or even subpeaks may occur within a 2 range of about 2.5 . This has important consequences for the detection and verification of layer peaks in the corresponding angular range.
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    Bilayer insulator tunnel barriers for graphene-based vertical hot-electron transistors
    (Cambridge : Royal Society of Chemistry, 2015) Vaziri, S.; Belete, M.; Dentoni Litta, E.; Smith, A.D.; Lupina, G.; Lemme, M.C.; Östling, M.
    Vertical graphene-based device concepts that rely on quantum mechanical tunneling are intensely being discussed in the literature for applications in electronics and optoelectronics. In this work, the carrier transport mechanisms in semiconductor–insulator–graphene (SIG) capacitors are investigated with respect to their suitability as electron emitters in vertical graphene base transistors (GBTs). Several dielectric materials as tunnel barriers are compared, including dielectric double layers. Using bilayer dielectrics, we experimentally demonstrate significant improvements in the electron injection current by promoting Fowler–Nordheim tunneling (FNT) and step tunneling (ST) while suppressing defect mediated carrier transport. High injected tunneling current densities approaching 103 A cm−2 (limited by series resistance), and excellent current–voltage nonlinearity and asymmetry are achieved using a 1 nm thick high quality dielectric, thulium silicate (TmSiO), as the first insulator layer, and titanium dioxide (TiO2) as a high electron affinity second layer insulator. We also confirm the feasibility and effectiveness of our approach in a full GBT structure which shows dramatic improvement in the collector on-state current density with respect to the previously reported GBTs. The device design and the fabrication scheme have been selected with future CMOS process compatibility in mind. This work proposes a bilayer tunnel barrier approach as a promising candidate to be used in high performance vertical graphene-based tunneling devices.
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    Ba termination of Ge(001) studied with STM
    (Bristol : IOP Publishing, 2015) Koczorowski, W.; Grzela, T.; Radny, M.W.; Schofield, S.R.; Capellini, G.; Czajka, R.; Schroeder, T.; Curson, N.J.
    We use controlled annealing to tune the interfacial properties of a sub-monolayer and monolayer coverages of Ba atoms deposited on Ge(001), enabling the generation of either of two fundamentally distinct interfacial phases, as revealed by scanning tunneling microscopy. Firstly we identify the two key structural phases associated with this adsorption system, namely on-top adsorption and surface alloy formation, by performing a deposition and annealing experiment at a coverage low enough (~0.15 ML) that isolated Ba-related features can be individually resolved. Subsequently we investigate the monolayer coverage case, of interest for passivation schemes of future Ge based devices, for which we find that the thermal evaporation of Ba onto a Ge(001) surface at room temperature results in on-top adsorption. This separation (lack of intermixing) between Ba and Ge layers is retained through successive annealing steps to temperatures of 470, 570, 670 and 770 K although a gradual ordering of the Ba layer is observed at 570 K and above, accompanied by a decrease in Ba layer density. Annealing above 770 K produces the 2D surface alloy phase accompanied by strain relief through monolayer height trench formation. An annealing temperature of 1070 K sees a further change in surface morphology but retention of the 2D surface alloy characteristic. These results are discussed in view of their possible implications for future semiconductor integrated circuit technology.
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    Investigation of the copper gettering mechanism of oxide precipitates in silicon
    (Pennington, NJ : ECS, 2015) Kissinger, G.; Kot, D.; Klingsporn, M.; Schubert, M.A.; Sattler, A.; Müller, T.
    One of the reasons why the principal gettering mechanism of copper at oxide precipitates is not yet clarified is that it was not possible to identify the presence and measure the copper concentration in the vicinity of oxide precipitates. To overcome the problem we used a 14.5 nm thick thermal oxide layer as a model system for an oxide precipitate to localize the place where the copper is collected. We also analyzed a plate-like oxide precipitate by EDX and EELS and compared the results with the analysis carried out on the oxide layer. It is demonstrated that both the interface between the oxide precipitate being SiO2 and the silicon matrix and the interface between the thermal oxide and silicon consist of a 2–3 nm thick SiO layer. As the results of these experiments also show that copper segregates at the SiO interface layer of the thermal oxide it is concluded that gettering of copper by oxide precipitates is based on segregation of copper to the SiO interface layer.