Multilevel HfO2-based RRAM devices for low-power neuromorphic networks

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Date
2019
Volume
7
Issue
8
Journal
Series Titel
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Publisher
Melville, NY : AIP Publ.
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Abstract

Training and recognition with neural networks generally require high throughput, high energy efficiency, and scalable circuits to enable artificial intelligence tasks to be operated at the edge, i.e., in battery-powered portable devices and other limited-energy environments. In this scenario, scalable resistive memories have been proposed as artificial synapses thanks to their scalability, reconfigurability, and high-energy efficiency, and thanks to the ability to perform analog computation by physical laws in hardware. In this work, we study the material, device, and architecture aspects of resistive switching memory (RRAM) devices for implementing a 2-layer neural network for pattern recognition. First, various RRAM processes are screened in view of the device window, analog storage, and reliability. Then, synaptic weights are stored with 5-level precision in a 4 kbit array of RRAM devices to classify the Modified National Institute of Standards and Technology (MNIST) dataset. Finally, classification performance of a 2-layer neural network is tested before and after an annealing experiment by using experimental values of conductance stored into the array, and a simulation-based analysis of inference accuracy for arrays of increasing size is presented. Our work supports material-based development of RRAM synapses for novel neural networks with high accuracy and low-power consumption. © 2019 Author(s).

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Keywords
Analog computers, Classification (of information), Energy efficiency, Hafnium oxides, Pattern recognition, RRAM, Annealing experiments, Classification performance, High energy efficiency, Low-power consumption, National Institute of Standards and Technology, Neuromorphic networks, Resistive switching memory, Simulation-based analysis, Low power electronics
Citation
Milo, V., Zambelli, C., & Olivo, P. (2019). Multilevel HfO2-based RRAM devices for low-power neuromorphic networks. 7(8). https://doi.org//10.1063/1.5108650
License
CC BY 4.0 Unported