Multilevel HfO2-based RRAM devices for low-power neuromorphic networks

dc.bibliographicCitation.firstPage81120eng
dc.bibliographicCitation.issue8eng
dc.bibliographicCitation.journalTitleAPL materials : high impact open access journal in functional materials scienceeng
dc.bibliographicCitation.volume7eng
dc.contributor.authorMilo, V.
dc.contributor.authorZambelli, C.
dc.contributor.authorOlivo, P.
dc.date.accessioned2021-10-20T12:00:24Z
dc.date.available2021-10-20T12:00:24Z
dc.date.issued2019
dc.description.abstractTraining and recognition with neural networks generally require high throughput, high energy efficiency, and scalable circuits to enable artificial intelligence tasks to be operated at the edge, i.e., in battery-powered portable devices and other limited-energy environments. In this scenario, scalable resistive memories have been proposed as artificial synapses thanks to their scalability, reconfigurability, and high-energy efficiency, and thanks to the ability to perform analog computation by physical laws in hardware. In this work, we study the material, device, and architecture aspects of resistive switching memory (RRAM) devices for implementing a 2-layer neural network for pattern recognition. First, various RRAM processes are screened in view of the device window, analog storage, and reliability. Then, synaptic weights are stored with 5-level precision in a 4 kbit array of RRAM devices to classify the Modified National Institute of Standards and Technology (MNIST) dataset. Finally, classification performance of a 2-layer neural network is tested before and after an annealing experiment by using experimental values of conductance stored into the array, and a simulation-based analysis of inference accuracy for arrays of increasing size is presented. Our work supports material-based development of RRAM synapses for novel neural networks with high accuracy and low-power consumption. © 2019 Author(s).eng
dc.description.versionpublishedVersioneng
dc.identifier.urihttps://oa.tib.eu/renate/handle/123456789/7065
dc.identifier.urihttps://doi.org/10.34657/6112
dc.language.isoengeng
dc.publisherMelville, NY : AIP Publ.eng
dc.relation.doihttps://doi.org/10.1063/1.5108650
dc.relation.essn2166-532X
dc.rights.licenseCC BY 4.0 Unportedeng
dc.rights.urihttps://creativecommons.org/licenses/by/4.0/eng
dc.subject.ddc620eng
dc.subject.ddc600eng
dc.subject.otherAnalog computerseng
dc.subject.otherClassification (of information)eng
dc.subject.otherEnergy efficiencyeng
dc.subject.otherHafnium oxideseng
dc.subject.otherPattern recognitioneng
dc.subject.otherRRAMeng
dc.subject.otherAnnealing experimentseng
dc.subject.otherClassification performanceeng
dc.subject.otherHigh energy efficiencyeng
dc.subject.otherLow-power consumptioneng
dc.subject.otherNational Institute of Standards and Technologyeng
dc.subject.otherNeuromorphic networkseng
dc.subject.otherResistive switching memoryeng
dc.subject.otherSimulation-based analysiseng
dc.subject.otherLow power electronicseng
dc.titleMultilevel HfO2-based RRAM devices for low-power neuromorphic networkseng
dc.typeArticleeng
dc.typeTexteng
tib.accessRightsopenAccesseng
wgl.contributorIHPeng
wgl.subjectIngenieurwissenschafteneng
wgl.typeZeitschriftenartikeleng
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