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    Multilevel HfO2-based RRAM devices for low-power neuromorphic networks
    (Melville, NY : AIP Publ., 2019) Milo, V.; Zambelli, C.; Olivo, P.
    Training and recognition with neural networks generally require high throughput, high energy efficiency, and scalable circuits to enable artificial intelligence tasks to be operated at the edge, i.e., in battery-powered portable devices and other limited-energy environments. In this scenario, scalable resistive memories have been proposed as artificial synapses thanks to their scalability, reconfigurability, and high-energy efficiency, and thanks to the ability to perform analog computation by physical laws in hardware. In this work, we study the material, device, and architecture aspects of resistive switching memory (RRAM) devices for implementing a 2-layer neural network for pattern recognition. First, various RRAM processes are screened in view of the device window, analog storage, and reliability. Then, synaptic weights are stored with 5-level precision in a 4 kbit array of RRAM devices to classify the Modified National Institute of Standards and Technology (MNIST) dataset. Finally, classification performance of a 2-layer neural network is tested before and after an annealing experiment by using experimental values of conductance stored into the array, and a simulation-based analysis of inference accuracy for arrays of increasing size is presented. Our work supports material-based development of RRAM synapses for novel neural networks with high accuracy and low-power consumption. © 2019 Author(s).
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    Correction: Interface-engineered reliable HfO2-based RRAM for synaptic simulation (Journal of Materials Chemistry C (2019) DOI: 10.1039/c9tc04880d)
    (London [u.a.] : RSC, 2019) Wang, Qiang; Niu, Gang; Roy, Sourav; Wang, Yankun; Zhang, Yijun; Wu, Heping; Zhai, Shijie; Bai, Wei; Shi, Peng; Song, Sannian; Song, Zhitang; Xie, Ya-Hong; Ye, Zuo-Guang; Wenger, Christian; Meng, Xiangjian; Ren, Wei
    There was an error in the author list of this published article. The corresponding authors for this paper are Gang Niu (gangniu@xjtu.edu.cn) and Wei Ren (wren@mail.xjtu.edu.cn). The footnote indicating that Qiang Wang and Gang Niu contributed equally to the work was not intended. The corrected author list and notations are shown here. The Royal Society of Chemistry apologises for these errors and any consequent inconvenience to authors and readers. © The Royal Society of Chemistry 2019.
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    On the Impact of Strained PECVD Nitride Layers on Oxide Precipitate Nucleation in Silicon
    (Pennington, NJ : ECS, 2019) Kissinger, G.; Kot, D.; Costina, I.; Lisker, M.
    PECVD nitride layers with different layer stress ranging from about 315 MPa to −1735 MPa were deposited on silicon wafers with similar concentration of interstitial oxygen. After a thermal treatment consisting of nucleation at 650°C for 4 h or 8 h followed annealing 780°C 3 h + 1000°C 16 h in nitrogen, the profiles of the oxide precipitate density were investigated. The binding states of hydrogen in the layers was investigated by FTIR. There is a clear effect of the layer stress on oxide precipitate nucleation. The higher the compressive layer stress is the higher is a BMD peak below the front surface. If the nitride layer is removed after the nucleation anneal the BMD peak below the front surface becomes lower. It is possible to model the BMD peak below the surface by vacancy in-diffusion from the silicon/nitride interface. With increasing duration of the nucleation anneal the vacancy injection from the silicon/nitride interface decreases and with increasing compressive layer stress it increases. © The Author(s) 2019.
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    Toward Reliable Multi-Level Operation in RRAM Arrays: Improving Post-Algorithm Stability and Assessing Endurance/Data Retention
    (Piscataway : Institute of Electrical and Electronics Engineers Inc., 2019) Perez, E.; Zambelli, C.; Mahadevaiah, M.K.; Olivo, P.; Wenger, C.
    Achieving a reliable multi-level operation in resistive random access memory (RRAM) arrays is currently a challenging task due to several threats like the post-algorithm instability occurring after the levels placement, the limited endurance, and the poor data retention capabilities at high temperature. In this paper, we introduced a multi-level variation of the state-of-the-art incremental step pulse with verify algorithm (M-ISPVA) to improve the stability of the low resistive state levels. This algorithm introduces for the first time the proper combination of current compliance control and program/verify paradigms. The validation of the algorithm for forming and set operations has been performed on 4-kbit RRAM arrays. In addition, we assessed the endurance and the high temperature multi-level retention capabilities after the algorithm application proving a 1 k switching cycles stability and a ten years retention target with temperatures below 100 °C.
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    On-Chip Dispersion Measurement of the Quadratic Electro-Optic Effect in Nonlinear Optical Polymers Using a Photonic Integrated Circuit Technology
    (New York, NY : IEEE, 2019) Steglich, Patrick; Villringer, Claus; Dietzel, Birgit; Mai, Christian; Schrader, Sigurd; Casalboni, Mauro; Mai, Andreas
    A novel method to determine the dispersion of the quadratic electro-optic effect in nonlinear optical materials by using a silicon-on-insulator microring resonator is presented. The microring consists of a silicon slot waveguide enabling large dc electric field strength at low applied voltages. The dispersion of third-order hyperpolarizability of a linear conjugated dye is approximated by using a two-level model for the off-resonant spectral region. As an example, the dispersion of the resonance wavelength of the resonator filled with a dye doped polymer was measured in dependence of the applied dc voltage. The polymer was poly (methylmethacrylate) doped with 5 wt% disperse red 1 (DR1), and the measurements have been carried out at the telecommunication wavelength band around 1550 nm (optical C-band). The described measurements represent a new technique to determine the dispersion of the third-order susceptibility and molecular hyperpolarizability of the material filled into the slot of the ring-resonator. © 2019 IEEE.
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    A Scalable Four-Channel Frequency-Division Multiplexing MIMO Radar Utilizing Single-Sideband Delta-Sigma Modulation
    (New York, NY : IEEE, 2019) Ng, Herman Jalli; Hasan, Raqibul; Kissinger, Dietmar
    A scalable four-channel multiple-input multiple-output (MIMO) radar that features a modular system architecture and a novel frequency-division multiplexing approach is presented in this article. It includes a single 30-GHz voltage-controlled oscillator (VCO) for the local oscillator signal generation, four cascaded 120-GHz transceivers with a frequency quadrupler, and on-board differential series-fed patch antennas. The utilized uniform antenna configuration results in 16 virtual array elements and enables an angular resolution of 6.2°. The vector modulators in the transmit (TX) paths allow the application of complex bit streams of second-order delta-sigma modulators easily generated on a field-programmable gate array (FPGA) to implement single-sideband (SSB) modulation on the TX signals resulting in orthogonal waveforms for the MIMO operation. Only one phase-locked loop and no digital-To-Analog converter is required. The waveform diversity also allows the simultaneous transmission of the TX signals to reduce the measurement time. The application of the SSB modulation on the frequency-modulated continuous-wave MIMO radar requires only half of the intermediate frequency bandwidth compared with the double-sideband modulation. The issue of the phase and amplitude mismatches at the virtual array elements due to the scalable radar architecture is addressed and a calibration solution is introduced in this article. Radar measurements using different numbers of virtual array elements were compared and the digital-beamforming method was applied to the results to create 2-D images. © 1963-2012 IEEE.
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    Shallow and Undoped Germanium Quantum Wells: A Playground for Spin and Hybrid Quantum Technology
    (Weinheim : Wiley-VCH, 2019) Sammak, Amir; Sabbagh, Diego; Hendrickx, Nico W.; Lodari, Mario; Wuetz, Brian Paquelet; Tosato, Alberto; Yeoh, LaReine; Bollani, Monica; Virgilio, Michele; Schubert, Markus Andreas; Zaumseil, Peter; Capellini, Giovanni; Veldhorst, Menno; Scappucci, Giordano
    Buried-channel semiconductor heterostructures are an archetype material platform for the fabrication of gated semiconductor quantum devices. Sharp confinement potential is obtained by positioning the channel near the surface; however, nearby surface states degrade the electrical properties of the starting material. Here, a 2D hole gas of high mobility (5 × 10 5 cm 2 V −1 s −1 ) is demonstrated in a very shallow strained germanium (Ge) channel, which is located only 22 nm below the surface. The top-gate of a dopant-less field effect transistor controls the channel carrier density confined in an undoped Ge/SiGe heterostructure with reduced background contamination, sharp interfaces, and high uniformity. The high mobility leads to mean free paths ≈ 6 µm, setting new benchmarks for holes in shallow field effect transistors. The high mobility, along with a percolation density of 1.2 × 10 11 cm −2 , light effective mass (0.09m e ), and high effective g-factor (up to 9.2) highlight the potential of undoped Ge/SiGe as a low-disorder material platform for hybrid quantum technologies. © 2019 The Authors. Published by WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
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    On the Impact of Strained PECVD Oxide Layers on Oxide Precipitation in Silicon
    (Pennington, NJ : ECS, 2019) Kissinger, G.; Kot, D.; Lisker, M.; Sattler, A.
    PECVD oxide layers with different layer stress ranging from about −305.2 MPa to 39.9 MPa were deposited on silicon wafers with similar concentration of interstitial oxygen. After a thermal treatment consisting of rapid thermal annealing (RTA) and furnace annealing 780°C 3 h + 1000°C 16 h in nitrogen the profiles of the oxide precipitate density were investigated. Supersaturations of self-interstitials as function of layer stress were determined by adjusting modelling results to measured depth profiles of bulk microdefects. The self-interstitial supersaturation generated by RTA at 1250°C and 1175°C at the silicon/oxide interface is increasing linearly with increasing layer stress. Values for self-interstitial supersaturation determined on deposited oxide layers after RTA at 1250°C and 1175°C are very similar to values published for RTO by Sudo et al. An RTA at 1175°C with a PECVD oxide on top of the wafer is a method to effectively suppress oxygen precipitation in silicon wafers. Nucleation anneals carried out at 650°C for 4 h and 8 h did not show any effect of PECVD oxide layers on oxide precipitate nucleation. © The Author(s) 2019.
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    Miniature switchable millimeter-wave BiCMOS low-noise amplifier at 120/140 GHz using an HBT switch
    (Basel : MDPI, 2019) Heredia, Julio; Ribó, Miquel; Pradell, Lluís; Wipf, Selin Tolunay; Göritz, Alexander; Wietstruck, Matthias; Wipf, Christian; Kaynak, Mehmet
    A 120-140 GHz frequency-switchable, very compact low-noise amplifier (LNA) fabricated in a 0.13 µm SiGe:C BiCMOS technology is proposed. A single radio-frequency (RF) switch composed of three parallel hetero junction bipolar transistors (HBTs) in a common-collector configuration and a multimodal three-line microstrip structure in the input matching network are used to obtain a LNA chip of miniaturized size. A systematic design procedure is applied to obtain a perfectly balanced gain and noise figure in both frequency states (120 GHz and 140 GHz). The measured gain and noise figure are 14.2/14.2 dB and 8.2/8.2 dB at 120/140 GHz respectively, in very good agreement with circuit/electromagnetic co-simulations. The LNA chip and core areas are 0.197 mm2 and 0.091 mm2, respectively, which supposes an area reduction of 23.4% and 15.2% compared to other LNAs reported in this frequency band. The experimental results validate the design procedure and its analysis. © 2019 by the authors.
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    Impact of the precursor chemistry and process conditions on the cell-to-cell variability in 1T-1R based HfO2 RRAM devices
    (London : Nature Publishing Group, 2018) Grossi, A.; Perez, E.; Zambelli, C.; Olivo, P.; Miranda, E.; Roelofs, R.; Woodruff, J.; Raisanen, P.; Li, W.; Givens, M.; Costina, I.; Schubert, M.A.; Wenger, C.
    The Resistive RAM (RRAM) technology is currently in a level of maturity that calls for its integration into CMOS compatible memory arrays. This CMOS integration requires a perfect understanding of the cells performance and reliability in relation to the deposition processes used for their manufacturing. In this paper, the impact of the precursor chemistries and process conditions on the performance of HfO2 based memristive cells is studied. An extensive characterization of HfO2 based 1T1R cells, a comparison of the cell-to-cell variability, and reliability study is performed. The cells’ behaviors during forming, set, and reset operations are monitored in order to relate their features to conductive filament properties and process-induced variability of the switching parameters. The modeling of the high resistance state (HRS) is performed by applying the Quantum-Point Contact model to assess the link between the deposition condition and the precursor chemistry with the resulting physical cells characteristics.